DAC Resistor for FPGA VGA

The real goal for anything that has VGA, DVI or LCD oriented is to be able to display output data to a user in a way that is easy to understand so that they can give some intelligent input by creating a VGA controller that uses a resistor DAC to create 512 unique VGA colors.

This will be done by using a 9 resistor digital to analog converter connected to 9 pins on the FPGA. A 25.175 MHz can oscillator will also be needed for the global clock input signal into the CPLD. The language of choice to use with the CPLD and Altera s tools will be VHDL.

The CPLD that was used as a VGA controller has 128 macrocells and 2,500 usable logic gates. The +5v regulator were used to keep the voltages to the CPLD Vdd in check. The Altera style JTAG port will be used to program the CPLD through the ByteBlaster MV cable that requires connecting to a few pins on the FPGA. While the basic power circuit, the battery connects to the input terminal of the 7805, which regulates down to +5v for the output.

Rest of the project