FPGA Based Digital Oscilloscope Project

Creating a digital oscilloscope on FPGA is the main goal of the project with the aim of minimizing external circuitry.

Due to fast development time and high performance speed, a digital oscilloscope on a FPGA is desired. Digital scopes are desirable for their larger bandwidth, ability to trigger on any condition, for their real-time DSP operations, and the ability to output buffered digital information. They provide benefit for a long scope history and pipelined information that can be digitally processed and filtered because of the availability of managed on-chip memory.

The delta-sigma topology is the simplest hardware topology for the analog-to-digital converter (ADC) where a time-averaged single-wire bit stream output must be digitally filtered to retrieve the signal data. The fastest chips attainable were in the order of 10MSps due to the limit of small outline integrated circuit (SOIC) wherein its process is being phased out in favor of smaller small-outline packages.

The VGA-mapped SRAM is written by the trace display while reading the user-specified control parameters to generate a grid, the vertical volts/div, and the sec/div speed of the trace. The speed of display is directly related to decimated signal acquisition speed.

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