Logic Analyzer Based on Win-32

This is a new version of an old logic analyzer project where a multithreaded Win-32 front-end and a native USB interface is used.

The version of the old project includes a front-end originally written in BASIC and uses the parallel port on a PC for communications. The use of multithreaded Win-32 front-end allows a good user control of the hardware. To start sampling on a rising or falling edge on any particular channel, it contains a trigger system. Special drivers will be required under a protected-mode O/S for the parallel hardware-to-PC interface. A plastic box is used to pack the logic analyzer with colored tip-jacks on the front which correspond to individual channel inputs with several extra jacks for auxiliary trigger inputs and outputs.

From the wide display, the user is allowed to select sample rate, trigger source, and other parameters using the pull-down menus. The status of the USB connection is indicated by the sampling thread status that is shown in the lower right corner of the screen.

The AM7205 chip is the key element of the analyzer. A 20MHz oscillator divided into many frequencies provides the sample clock using CMOS counter.

Rest of the project