Experiment in Sampling Time on Digital Control Loop

In the last post I demonstrated a Finite Math simulator in Haskell. It this post I have used an enhanced version of the simulator to simulate the effect of gain and sample delay on transient response.

Simulator Enhancement

The original simulator used in the last post the plant was modeled with state averaging. The enhanced simulator calculates the actual voltage and current waveforms using two differential equations, one for the top switch of the buck on, and the other for the top switch of the buck off. The second enhancement was to extend the plant to allow for both a resistive and current source load.

You can see above that the current waveform shows the ramps as in a real buck. The simulation feeds the duty cycle to the plant and it calculates upward and downward ramps individually.

This shows the effect of the change. The left side is the original simulation using two gains and a floating point reference, is on the left. The enhanced simulation is on the right. The transient response is more sensitive to gain. This demonstrates that an average model under predicts the response.

One could simulate with Spice and get the same results as the enhanced simulation, but the enhanced simulation runs in less than 1 second, and the spice simulation would take several minutes.

This plot shows how the buck responses to input, reference, resistive load, and current source load changes.

In all the above plots, the values used by the compensator, and the values plotted, are at the end of the period. These plots do not show the up/down ramp, even though the system uses the ramp in the calculations.

Sensitivity to Sample Time

The enhanced simulator supports controlling the time that the voltage and current are sampled. These sampled values are used by the state feedback compensation. Now I want to explore the effect of sample delay on the transient response.

This shows the ideal gain of 0.8, which is the gain used in the dsPIC discussed in my other posts. The constants used in the compensator came from Ackerman’s formula using an average state model. We know from the floating point sim that the math works, but it appears to lead to sub-optimal results once finite math is used, and the ramp up/down is used. You can see that in the second plot of this post which compares the original simulation to the enhanced on. My conclusion is that the state feedback techniques are limited by the use of averaged models.

This plot also shows the effect of sample time. In this plot 100% means sampling at the end of the period, and 10% means sampling 10% of the way into the period. The duty cycle runs at about 8%, so 10% is just at the peak. You can see some variation in the response, but nothing to worry about.

Now we change the gain to 0.5. Not the end of the world, but it is starting to become measurable.

Finally we change the gain to 0.2 and things start to fall apart. We are at the edge of stability when the gain is 0.2 and the sample delay is 20%. I did not include 10% because it goes completely out of control.

In this plot the sample delay of the voltage and current are independently controlled. When voltage is at 0.9, the current is at 0.1, etc. This allows us to see the extremes of delaying only one at a time or both together. The worst case line is labeled 10%, which means the voltage is sampled 10% of the way into the period, and the current is sampled at the end. The best response is with current sampled at 10% and voltage at the end.

This plot is the same at gain of 0.4. Again, it is sensitive to voltage when moved back to 10%. This suggests it is probably better to measure current before voltage in a real application.

Summing Up

Sensitivity to sample point is not an issue if you can sample at least 30% into the cycle, and it is better to sample current before voltage.