Kalpana Manickavasagam

A very important aspect of memory design is yield analysis which takes into account the performance of SRAM cells in the presence of process variations. This project involves a study of algorithms for performing yield analysis. Firstly, exhaustive sampling is done which has very good accuracy but…

The project involves the design of a high speed communication link for a channel that has 36 dB loss at 5 GHz. We have achieved a data rate of 10Gbps for a very low power dissipation of 8.7 mW, targetting a BER of 1e-12, in the 90 nm technology.

The goal of this project is to build an energy-efficient, robust and cost effective platform for the monitoring and control of the various subsystems of the Intel Atom Processor. This removes considerable overhead on the Primary (monitored) platform. Initially, we built the Secondary (monitoring)…

OFDM is the emerging technology for high data rates in various standards. In this project, a novel architecture has been proposed both in the transmitter and the receiver end, in order to provide a solution for the PAPR problem in the analog domain. 90 nm technology, with a Vdd of 1 V has been…

INTRODUCTION

All real world signals are analog. The processing is, however, done in the digital domain for most applications. Hence a good interface, an Analog to Digital Converter (ADC) is very much essential. There are 2 types of data converters: Nyquist Rate converters and Oversampling data…

‘SAVE POWER’ is the most often heard slogan in this era. Our model basically controls the switching on and off of the equipments like fans, lights, etc. based on the presence or absence of people within the room. This will avoid unnecessary wastage of power by people who fail to switch off the…

To design a 2-stage, single-ended op-amp with PMOS inputs with the following design specifications.

The clock signals 1 and 2 are generated from the non overlapping clock generator. Clock 2 is fed to the Latched comparator while the clock 1 is fed to the D flip flop. When V+ is high and V- is low, only M9 and M10 (top right) conduct. The drain of M6 is then charged to VDD. This turns off M8. M7…

 Implementation of adaptive equalization using LMS algorithm in DSP
Image restoration using an inverse filter in Blackfin DSP processor
Image compression of a 2D image matrix using Discrete Cosine Transform (DCT) and recovery of the original image with IDCT in DSP processor
Two…

Archituecture Propsed (Slight modifications to be incorporated)

The system monitoring the energy consumption of individual subsystems has already been implemented on board the Atom LEAP platform.