Michael Parker
Altera - Sr Technical Manager, DSP
My responsibility is to provide the direction and detailed technical requirements used to develop Altera's DSP silicon architectures, DSP and floating point toolflows, IP cores and application specific reference designs.
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FPGA and CPLD Solutions
Altera programmable solutions enable system and semiconductor companies to rapidly and cost-effectively innovate, differentiate and win in their markets. Find out more about Altera's FPGA, CPLD and ASIC...
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Blog Post: Software and Hardware Platforms Enable Over 1 TeraFlop Processing Rates
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September 15, 2011
Computing applications have long used floating point numerical processing, including many in CPU architectures, which are mathematically superior and support wide dynamic ranges.
Blog Post: Advantages of FPGA-based Motor Control
May 05, 2011
Systems operated by electric motors commonly utilize control loops that can monitor the position, velocity, current or other aspects to provide the desired operation. This is accomplished by comparing the actual measurements to a desired state, and creating an error signal from the difference,…
Blog Post: FPGA vs. DSP Design Reliability and Maintenance
May 02, 2011
Digital signal processing (DSP) underpins modern wireless and wireline communications, medical diagnostic equipment, military systems, audio and video equipment, and countless other products, becoming increasingly common in consumers’ lives. Due to advances in semiconductor technology, ever more…
Blog Post: FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture
April 29, 2011
Across a range of applications, the two most common functions implemented in FPGA-based high-performance signal processing are finite impulse response (FIR) filters and fast Fourier transforms (FFTs). The FPGA’s digital signal processing (DSP) architecture must be optimized to allow the most…
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