phil_simpson

Phil Simpson

Altera - Sr. Manager, SW Product Planning

Focused on design flows for FPGA devices.

Interests

Web Links

Altera

Quotes

It is a common experience that a problem difficult at night is resolved in the morning after the committee of sleep has worked on it.

John Steinbeck

EEWeb Stats

Phil's Recent Posts:

View All View Posts View Comments

Blog Comment: Would you..Could you..Should you..Compile your FPGA design on the Cloud?

December 08, 2011

Paul,
I agree with your comments. For many users they will want to use their version control system on their network, upload the files and scripts. Run the scripts, download the results and files and delete the prject from the Cloud. In theory, this could be built into the Make File.

Blog Post: Would you..Could you..Should you..Compile your FPGA design on the Cloud?

December 08, 2011

What if FPGA vendors offered access to their software via Cloud? Would you use it? If you would use it, what price are you willing to pay for this capability?

Blog Post: A Plan for Debug

June 30, 2011

With the increase in complexity of FPGA device capabilities and the associated designs targeting these FPGA devices, in-system debug can quickly become a bottleneck in the FPGA design cycle. This article describes a methodology that can help reduce the in-system debug cycle and improve the quality…

Blog Post: Is Your FPGA Design Reusable? (A Design Checklist)

June 01, 2011

Design and intellectual property (IP) reuse can improve the quality of your FPGA design, shorten your design and verification cycle and allow faster time-to-market. However, creating IP for design reuse comes at a cost; there is extra effort involved in making a design reusable.

 
Click Here