Sriram Mukund

Designed a Network-On-Chip (NoC) architecture with Forward Error Correction in a tree topology using asynchronous tech- niques in System Verilog.

Designed the circuit and layout for a simplified Neural Network that reacts to a certain sequence of inputs. The network consists of 14 individual neurons, each of which is excited based on a particular input.

Designed the circuit and layout for a Simplified 16 bit Motion Estimator for Video Compression for a DSP. It reads two 1× 4-bit pixel blocks from two SRAM arrays, calculates the absolute difference and accumulates this difference for all the pair of pixels in the two blocks.

Used the SimpleScalar processor simulation tool to redesign a baseline processor by changing several micro-architectural blocks, such as machine width, branch predictors, register update units, cache sizes etc., to improve the performance and obtain the optimum MIPS rating.

Wrote code to design an Automatic Test Pattern Generator (ATPG), in C programming language, that inputs a circuit de- scription in textual format and generates input vectors that detect single stuck at fault at certain lines in the circuit.

Designed a memory controller for DDR2 memories using ASIC flow. The behavioral design was done using NCSim suite and the synthesis using Design Compiler. The controller contains an initialization engine, logic for scalar and block read and write, and the refresh logic.