EEWeb Member Projects: analog-cmos-ic-design
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Efficient Yield Estimation and Optimization for a 6-T SRAM Cell
Posted Jun 22, 2011 By Kalpana ManickavasagamA very important aspect of memory design is yield analysis which takes into account the performance of SRAM cells in the presence of process…Comments(1) -
Design of a 10 Gbps high speed, low power I/O transceiver for a FR4 channel
Posted Jun 21, 2011 By Kalpana ManickavasagamThe project involves the design of a high speed communication link for a channel that has 36 dB loss at 5 GHz. We have achieved a data rate of 10Gbps…Comments(0) -
Analog Solutions for the PAPR Problem in OFDM
Posted Jun 20, 2011 By Kalpana ManickavasagamOFDM is the emerging technology for high data rates in various standards. In this project, a novel architecture has been proposed both in the transmitter and the receiver end, in order to provide a…Comments(0) -
Two Stage Operational Transconductance Amplifier Design
Posted Feb 02, 2011 By Kalpana ManickavasagamTo design a 2-stage, single-ended op-amp with PMOS inputs with the following design specifications.Comments(0) -
Pattern Generation System for Testing Data Converters
Posted Jan 30, 2011 By Kalpana ManickavasagamThe project instantiates the RS232 Reference Component, which communicates data with an RS232 terminal (Minicom in Linux), with a baud rate of 9600….Comments(0) -
High speed High precision fully differential operational amplifier
Posted Jan 30, 2011 By Kalpana ManickavasagamTwo fully-differential amplifiers were designed which have a mid-band gain of 8, differential output swing of 1.6V, gain error1%, supply voltage=1.8V and the load capacitance is 0.7pF. The first…Comments(1) -
A Bi-Quad CMOS SC Notch Filter IC Design and Testing
Posted Jan 21, 2011 By Jeremy RileyThis integrated CMOS switched-capacitor filter has all of its capacitors on-chip and requires only an external clock and a balanced 5V power-supply….Comments(0)
