EEWeb Member Projects: fpga
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Diffusion limited aggregation
Posted Dec 21, 2011 By Bruce LandA symmetric, shared memory, multiprocessor system was built on an Altera/Terasic DE2 FPGA board. The processors were derived from a stack machine…Comments(0) -
Digital Signature Algorithm
Posted May 03, 2011 By Shanthan MudhasaniA digital signature, an asymmetric cryptography is designed using VHDL. The implementation has a Message Digest block and a RSA block. Implemented…Comments(0) -
The Analysis of SMS in GSM Network
Posted Apr 12, 2011 By Fei YuStudent Research Training Program Septermber 2009 – May 2010 Designed and developed the system on FPGA. Tested different parameters to receive best performance of the systemComments(0) -
Detection & Alarming System on Individual Privacy Leak of GSM Communication
Posted Apr 12, 2011 By Fei YuNational Undergraduate Electronic Design Contest August 2008 1st Prize, Team leader, Detection and Alarming System on Individual Privacy Leak of GSM Communication…Comments(0) -
Compiler for FPGA based Emulation of Digital Circuits
Posted Apr 07, 2011 By Yucheng chiuDeveloped a compiler for FPGA emulation. It performs partitioning, inter‐routing, placement, and intra‐routing on a given netlist.(C++) Used modified Fiduccia-Mattheyses (F-M) heuristics to…Comments(0) -
VLSI BASED PID CONTROLLER (UNDERGRAD GRADUATION PROJECT)
Posted Mar 27, 2011 By Rahul GabaDeveloped VLSI front end code to interface ACTEL FPGA with 230V heating system. Learned the functioning and calibration of a PID controller.Comments(0) -
4-Core Processor Design
Posted Mar 26, 2011 By Purushotham kollaThis project aims at Sorting and Searching a large set of given numbers. 4 Homogeneous cores have been designed using verilog and implemented on a Spartan-6 Xilinx FPGA. Each core has a separate…Comments(0) -
FPGA Implementation of Median Filter for Noise
Posted Mar 24, 2011 By Keshavanand JayadevanA hardware and software implementation of median filter was done. A hardware implementation of Median filter algorithm (Noise removing Algorithm) using VHDL in Spartan2 FPGA family. The image files…Comments(0) -
High-Speed FPGA Solution for Pulse Generation and Detection
Posted Mar 21, 2011 By Tian ChuThis project tries to provide a low-cost high-speed FPGA solution for the pulse generation and detection at the Quantum Photonics Lab of Columbia…Comments(0) -
Maze Router, FGPA Design
Posted Mar 17, 2011 By Shyam Sundar MIkkiliImplemented a Single layer Maze Router using Verilog in the Xilinx ISE. Designed to find a path in a 4 × 4 maze using the Lee’s algorithm with obstacles included in the path. Designed and…Comments(0) -
Image Processing Toolkit for FPGAs
Posted Mar 17, 2011 By zubin kumarDeveloping an image processing toolkit for FPGAs leveraging Partial Runtime Reconfiguration (PRR) to save resources and improve flexibility on hardware. (Project in progress)Comments(0) -
CameraCube™ Interface for FPGAs
Posted Mar 17, 2011 By zubin kumarImplemented an interface for OV7620 VGA camera to capture static images and real time video and developed CImg programs to display them on a computer. (Summer 2010)Comments(0)
