A simple and efficient error-diffusion algorithm implementation in digital image processing. ● To achieve digital halftoning process by converting a gray scale image into a binary image with an…
Fabricated BDJ structures in 0.5um CMOS process, in order to investigate failure models and to adopt suitable structure with low power consumption and high light sensitivity. Designed self-sustained…
Developing an image processing toolkit for FPGAs leveraging Partial Runtime Reconfiguration (PRR) to save resources and improve flexibility on hardware. (Project in progress)
Implemented an interface for OV7620 VGA camera to capture static images and real time video and developed CImg programs to display them on a computer. (Summer 2010)
Implemented the Baseline JPEG encoder and decoder for converting BMP images to JPEG images and back to JPEG images. Codec implemented on Virtex 4 and Virtex 5 FPGA boards, designed for PRR (partial…