Developing an image processing toolkit for FPGAs leveraging Partial Runtime Reconfiguration (PRR) to save resources and improve flexibility on hardware. (Project in progress)
Implemented an interface for OV7620 VGA camera to capture static images and real time video and developed CImg programs to display them on a computer. (Summer 2010)
Implemented the Baseline JPEG encoder and decoder for converting BMP images to JPEG images and back to JPEG images. Codec implemented on Virtex 4 and Virtex 5 FPGA boards, designed for PRR (partial…
Developed and implemented scalable 8 bit and 32 bit drivers to interface FPGA boards to USB port using FTDI-TTL-232R cable. Usable with several families of FPGAs. (Summer 2009)
Posted Mar 08, 2011 By Guru Prasanna Mohan Karthick
Devised “Double Threshold FFT” algorithm for LSB Steganography, teaming with 3 peers. Implemented and tested it in MATLAB and Cyclone II Altera FPGA kit. Developed coding to interface VGA with…