EEWeb Pulse Magazine
Issue 5, 2011
Dr. David S. Touretzky
Robotics research with hexapod robots at Carnegie Mellon University.
Creating Combinatorial Logic (Part 1)
Salemi discusses concurrent (VHDL) and continuous (Verilog) assignments and how these can be used to implement simple combinatorial logic and buffers.
A Plan for Debug
Help reduce the in-system debug cycle and improve the quality of your FPGA design.