Electronics and Electrical Engineering Application Notes

Read the latest electronics engineering product design Application Notes.

MultiBoot and Fallback Using ICAP in UltraScale+ FPGAs

This application note describes a key feature of UltraScale+™ FPGAs—MultiBoot. The MultiBoot feature in UltraScale+ FPGAs allows the FPGA application to load two or more FPGA bitstreams under the control...

Spartan-7 FPGA Configuration with SPI Flash and Bank 14 at 1.35V

  • General
  • Posted Wednesday, November 15, 2017
This application note describes a method for configuring a Spartan®-7 FPGA from a 1.8V serial peripheral interface (SPI) NOR flash memory connected to the FPGA dedicated I/O bank 0 at...

Implementing JESD204B IP Core System Reference Design with Nios II Processor As Control Unit

The Altera JESD204B IP core is a high-speed point-to-point serial interface for digital-to-analog (DAC) or analog-to-digital (ADC) converters to transfer data to or from the FPGA devices. The JESD204B IP...

Using the C30 Compiler to Interface SPI Serial EEPROMs with dsPIC33F and PIC24F

The 25XXX series serial EEPROMs from Microchip Technology are SPI compatible and have maximum clock frequencies ranging from 3 MHz to 20 MHz. Manytimes when designing an application which utilizes...

FPGAs with SPI Serial Flash

Xilinx FPGAs are CMOS configurable latch (CCL) based and must be configured at power-up. Traditionally, Xilinx FPGA configuration is accomplished via the IEEE Std 1149.1 (JTAG) interface, a microprocessor, or...

Using SPI Flash with 7 Series FPGAs

Xilinx FPGAs require that a configuration bitstream is delivered at power-up. The SPI flash memories use a 4-wire synchronous serial data bus. The SPI flash configuration requires only four pins...

Programmable Instrumentation Amplifier with SPI Interface

The PGA280 is a high-precision instrumentation amplifier with digitally-controllable gain and signal integrity test capability. This device offers low offset voltage, near-zero offset and gain drift, excellent linearity, and nearly...

Daisy-Chaining SPI Devices

In typical SPI systems with one master and multiple slaves, a dedicated chip-select signal is used to address an individual slave. As the number of slaves increase, so do the...