Physical Design Engineer Graduate Trainee
Creates bottomsup elements of chip design including but not limited to FET, cell, and blocklevel custom layouts, abstract view generation and schematictolayout verification and debug using phases of physical design development including customer polygon editing, floor planning and verification. Troubleshoots a wide variety up to and including difficult design issues and applied proactive intervention. Executes and verifies complex chips development and execution of project methodologies and/or flow developments. Requires expansive knowledge and practical application of methodologies and physical design.
Bachelor Degree in Electrical and Electronics Engineering.Strong technical knowledge in VLSI Design.Familiarity with Cadence Virtuoso platform and Synopsys IC validator will be an added advantageCan work independently with minimum supervision.
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.