This engineering report describes a 20 V, 7.5 A power supply for 90 VAC to 264 VAC AIO power supplies which can also serve as a general purpose evaluation board for the combination of a HiperPFS-3 power factor stage with LinkSwitch-HP output stage using devices from the Power Integration’s HiperPFS-3 and LinkSwitch-HP device families.
The design is based on the PFS7526H IC for the PFC front end, with a LNK6779E utilized in an isolated flyback output stage. Due to low power sunsumption of LinkSwitch-HP device, no standby stage is needed to meet the no-load and light load consumption requirements.
- LNK6779E (4mS) was used for better no-load power and regulation in conjunction with a secondary optocoupler circuit.
- Secondary side regulation circuit was used in order to improve the output regulation, transient response and no-load consumption. Compensation network components were altered from standard values used in existing designs to improve the transient performance.
- Forced air-cooling is required when operating the power supply.
The circuit shown in Figures 3 and 4 utilizes the PFS7526H, the LNK6779E devices from Power Integrations in a 20 V, 150 W power factor corrected isolated flyback power supply intended to power an AIO power supply.
- Input EMI Filter and Rectifier - Fuse F1 provides overcurrent protection to the circuit and isolates it from the AC supply in the event of a fault. Diode bridge BR1 rectifies the AC input. Capacitors C2, C3, C4 and C6, in conjunction with inductors L1 and L4, constitute the EMI filter for attenuating both common mode and differential mode conducted noise. Film capacitor C7 provides input decoupling charge storage to reduce input ripple current at the switching frequencies and harmonics. Common mode choke LW has high leakage inductance used to minimize the resonance in the input current waveform.
- PFS7526H Boost Converter - The boost converter stage consists of the boost inductor T1 and the PFS7526H IC U1. This converter stage operates as a PFC boost converter, thereby maintaining a sinusoidal input current to the power supply while regulating the output DC voltage.
- PFC Input Feed Forward Sense Circuit - The input voltage of the power supply is sensed by the IC U1 using resistors R4, R5, R6 and R7. The capacitor C10 bypasses the V pin on IC U1.
- PFC Output Feedback - An output voltage resistive divider network consisting of resistors R10, R11, R12, and R13 provide a scaled voltage proportional to the output voltage as feedback to the controller IC U1 setting the PFC output at 385 V. Capacitor C14 decouples the U1 FB pin. Resistor R9 and capacitor C12 provide the control loop dominant pole. Capactior C11, attenuates high-frequency noise.
- LinkSwitch-HP Primary - The schematic in Figure 4 depicts a 20 V, 150 W LinkSwitch-HP based flyback DC-DC converter implemented using the LNK6779E. The LNK6779E device (U2) integrates an oscillator, an error amplifier and multi-mode control circuit, start-up and protection circuitry and a high-voltage power MOSFET all in one monolithic IC.
- Primary RZCD Clamp - Diode D3, VR3, C16 and R19 form a RZCD snubber that is used to limit the voltage stress across the LinkSwitch-HP. Peak drain voltage is therefore limited to typically less than 610 V providing significant margin to the 700 V drain voltage (BVDSS).
- Output Rectification - Output rectification of 20 V output is provided by diode D8, D9 and filtering is provided by capacitor C26, C27 and inductor L5 and C28. The snubber formed by R30, R31 and C25 provides high frequency filtering for improved EMI.
- External Current Limit Setting - The maximum cycle-by-cycle current limit is set by the resistor R20 connected to the PROGRAM (PD) pin. A 124 kΩ resistor in the design sets the maximum current limit to 100% of the LNK6779E’s default current limit.
- Feedback and Compensation Network - Secondary side regulation was used for this design instead of primary side regulation because of its no-load consumption (<200 mW) and transient response requirements (±2.5%).
- Primary Side Regulation - The output voltage is sensed through bias winding and resistor divider (R27 and R29) during the flyback period. The sensed output voltage is compared to the FEEDBACK (FB) pin threshold to regulate the output or to stop switching in case an overvoltage condition is detected (OVP). Voltage divider R28 and R29 is used to indirectly monitor the bus voltage during the integrated power MOSFET on-time.
- Secondary Side Regulation - The output voltage is controlled using shunt regulator U3. Resistors R36 and R37 sense the output voltage, forming a resistor divider connected to the reference input of IC U2. Changes in the output voltage and hence the voltage at the reference input of U2 results in changes in the cathode voltage of IC U2 and therefore optocoupler U5 LED current. This changes the voltage on CP pin of U2 and acts to maintain output voltage regulation.